Read only memories (“ROMs”) include a plurality of cells disposed in rows and columns to form an array. Conventional ROM cells are single-ended and include a plurality of transistors coupled to bit lines and word lines that are used to read and write a bit of data to the memory cell. However, these conventional single-ended ROMs have high area and power penalties and slower speeds due to large loads on bit lines. Additionally, the VCCmin performance of the ROMs are limited by the design and implementation of keeper circuits, which are implemented for assistance during read operations.